On planar bulk transistor devices, the threshold voltage of a p-channel MOSFET device is routinely adjusted using silicon germanium (SiGe) as the channel material. For example, it is well known to those skilled in the art how the threshold voltage of the p-channel device can be adjusted by varying the Ge content and/or thickness of the SiGe material layer defining the channel.
Planar fully depleted silicon on insulator (FDSOI) devices are also known to those skilled in the art. FDSOI technology relies on the use of a very thin layer of silicon located over a buried oxide layer to form the channel. Transistors are then built on the thin silicon layer. FDSOI is an attractive solution as transistor sizes shrink because FDSOI supports transistor operation at much lower VDD supply voltages, with low leakage and with reduced transistor threshold voltage variability.
It is noted that the use of silicon germanium (SiGe) as the channel material in FDSOI devices presents an attractive solution enabling the adjustment of p-channel device threshold voltage without impacting device performance. The fabrication process of the prior art first protects active regions identified for the n-channel devices, and then performs a selective SiGe epitaxy on the active regions identified for the p-channel devices. This process occurs, like with conventional bulk device fabrication, prior to formation of the gate stack, where the gate stack is formed over the SiGe(epi)+SOI layer.
There are, however, issues with this fabrication process. When implementing an ultra-thin body and box (UTBB) configuration for FDSOI (for example, with a 7 nm top silicon thickness and a 25 nm buried oxide thickness), the resulting channel after selective SiGe epitaxy to form SiGe+SOI is too thick with negative impact on device short channel effects. Additionally, it is difficult to control the Ge profile in the channel region for the SiGe epitaxy following subsequent thermal treatment as the Ge profile tends to be graded in a direction perpendicular to the channel layer. As a result, there is undesirable process variability.
A need thus exists in the art for an improved process supporting the use of silicon germanium (SiGe) as the channel material in FDSOI devices.